Must have prior work experience, training, or coursework in each of the followingbr 1. High speed logic design, timing and power optimization design techniques;br 2. VerilogVHDL RTL design and simulation, hardware debug and bring up;br 3. At least one of the following connectivity protocols PCI Express, CXL or DDR34;br 4. Evaluating high level needs, feasibility and implementation;br 5. FPGA architecture and software tools; andbr 6. Implementing major functional blocks in one or more chips in compute, networking and storage areas.br br Employer will accept alternate combination of education and experience PhD degree or foreign equivalent in Computer Science, Electrical Engineering or related field. Employer will accept any suitable combination of education, training, or experience.

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