Must have 1 year of experience in the followingbr UVM, System Verilog, VHDL, or Verilog;br Python, PERL, TCL, or Shell;br Design flows and methodologies for chip verification;br EDA tools; andbr CAD Technology.
Bachelors degree in Finance, Economics or a closely related field and three 3 years of experience in the job offered or as an FRC ETrader, STIR Trader, CoOp Intern or related role. Employer will accept Read more…
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