Education or experience to includebr br 1. Transistorlevel analog design.br 2. CMOS gate design and characterization.br 3. Resistance and capacitance parasitic analysis of circuit implementation.br 4. Design of one or more of these blocks Controlled impedance, transmitter, receiver, delaylocked loop DLL, phasedlocked loop PLL, phase interpolator, clock distribution, voltagebr regulator LDOs, bandgap or operational amplifier opamp.br 5. Cadence Virtuoso schematic entry, layout entry and review.br 6. Cadence ADE, ADE XL or ADE Assembler simulation.br 7. Spectre or HSpice circuit simulation.
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