Employer will accept a Masters degree or foreign equivalent in Electrical Engineering or related field. Position requires completion of a universitylevel course, research project,br internship, or thesis or 6 months of experience involving the followingbr 1 Digital ASIC Design methodology;br 2 Verilog language;br 3 Synthesis and static timing analysis;br 4 DesignVerification CAD tools NCSIM, Design Compiler, Formality, andor PrimeTime;br 5 Transistor Level Simulations Spice, Ultrasim, andor HSIM; andbr 6 TCL, PERL, or Python.
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