Power and signal integrity; Power simulation and power safety rules; Placing and routing multilayer boards for server products; DDR topology, layout, and routing; Complex ASIC chip design and dense board design; Cadence and ALLEGRO; Design for Manufacturing DFM and Design for Assembly DFA. Experience required in H.6A or H.10A must be postbaccalaureate and progressive in nature. Telecommuting permitted and travel may be required to various unanticipated locations throughout the U.S.

Categories: eb3

0 Comments

Leave a Reply

Avatar placeholder

Your email address will not be published. Required fields are marked *