Masters degree in Electrical Engineering, Electronic Engineering, or related field.br br Position requiresbr br 1. Utilizing Cadence Innovus or comparable APR tool to physically design integrated circuits.br 2. Utilizing Cadence PVSPegasus or comparable PV tool to complete DRCLVS checking of IC.br 3. Floorplanning blocks for automatic place and route.br 4. Running and interpreting static timing analysis on design blocks in advanced nodes lt;16nm using Cadence Tempus or comparable STA tool.br 5. Designing and synthesizing clock trees for IC using Cadence CCOpt or comparable CTS tool.br 6. Verifying logical equivalence of physical designs with source RTL using Cadence Conformal or comparable LEC tool.
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