Masters degree in Computer Science, Electrical Engineering, Electronics, or related field and 24 months of experience in the job offered or in a computerrelated occupation. Foreign degree equivalent accepted.br br In the alternative, employer will accept a Bachelors degree in Computer Science, Electrical Engineering, Electronics, or related field and 60 months of progressive, postbaccalaureate experience in the job offered or in a computerrelated occupation.br br Experience must include 24 months of experience in each of the followingbr 1.Testbench Architecture;br 2.Universal Verification Methodology UVM;br 3.Baseband Verification;br 4.Verilog, System Verilog, and System Verilog Assertions SVA;br 5.Functional Coverage and code coverage;br 6.UVM RAL Register Access Layer integration;br 7.Constrain Random verification environment;br 8.AMBA AHB and AXI protocol; andbr 9.Waveform viewing tools, including VCS, DVE, and Verdi.

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