Bachelors or foreign equivalent degree in ElectricalElectronic Engineering, Computer ScienceEngineering and five 5 years of experience in the job offered or related occupation.br br Alternatively, the employer will accept Masters or foreign equivalent degree in ElectricalElectronic Engineering, Computer ScienceEngineering and three 3 years of experience in the job offered or related occupation.br br Experience must include 3 three years of experience withbr br 1. Chip and block level verification using System Verilog and UVM methodology.br 2. Waiver generation, RTL lint analysis or Power analysis.br 3. Testplan creation using the knowledge of digital and analog signal processing, ethernet standard architecture and microprocessor architecture.br 4. Testbench component and testcase development, Assertion development.br 5. Clock domain crossing and coverage analysis.br 6. Digital and analog model code implementation for MixedSignal, high speed CDR products.br 7. Gate level simulations using sdf based timing files and debugging the netlist.br 8. Post synthesis ECO implementation and its verification using gate simulations.
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