Masters degree or foreign equivalent degree in ElectricalElectronic Engineering, Computer Engineering or a related field and eight 8 years of experience in developing advanced EDA design implementation methodologies. Education andor experience must include 1. Advanced Static Timing Analysis STA methodologies; 2. Logic verification tools; 3. DFT tools and methodologies; 4. Design tapeout with advanced process nodes 7nm or below; 5. Physical verification rules of advanced technology foundry nodes 7nm and below; 6. Timing closure techniques for high performance designs; 7. Hierarchical design methodologies; 8. Low power design methodologies; 9. Low power techniques to optimize for leakage and dynamic power; 10. Building design flow methodologies for designing large SoC chips containing multimillion instances and blocks; 11. Scripting languages including C, Python, Perl, and TCL; and 12. Creating and presenting technical product and technology white papers.

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