Masters degree in Electrical Engineering, Electronic Engineering, Computer Engineering, or a related field and 30 hours of academic project or thesis project work with making complex design tradeoffs in the field of VLSI physical design. Academic project or thesis project work to include 30 hours of any combination of the following skills ASIC physical design optimization through synthesis, place and route; or ASIC physical design timingelectricalphysical signoff analysis; or ASIC physical design DFT methodology; or ASIC physical design methodology development using Tel, C, Perl, or Python; or ASIC Product test engineering with silicon characterization and yield data analysis. Employer will accept up to 3 months of graduate internship, graduate research assistantship, or industry experience in lieu of the 30 hour requirement.
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