Masters degree or foreign equivalent in Electrical Engineering, Computer Science or a related field and two years of experience involving the following Conformal LP, PowerArtist, PTPTPX, Incisive, and VCS; Tcl, Perl or Python; UPFCPF, multivoltage domains, power gating and chip power management; Power management IPs; Optimization; and ASIC design flows and methodology.br br OR Bachelors degree or foreign equivalent in Electrical Engineering, Computer Science or a related field and five years of progressive postbaccalaureate experience involving the following Conformal LP, PowerArtist, PTPTPX, Incisive, and VCS; Tcl, Perl or Python; UPFCPF, multivoltage domains, power gating and chip power management; Power management IPs; Optimization; and ASIC design flows and methodology.br br Position reports to the Google Mountain View, CA office may allow for partial telecommuting.br br Any suitable combination of education, training, or experience is acceptable.
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